HISTORY AND DEVELOPMENT OF THE COMPANY ASE Technology Holding Co., Ltd. was jointly established on April 30, 2018, as a company limited by shares under the R.O.C. Company Law, by the combination of Advanced Semiconductor Engineering, Inc., which was incorporated on March 23, 1984, and Siliconware Precision Industries Co., Ltd., which was incorporated on May 17, 1984. ASEH directly controls ASE Group, SPIL Group, USI Group, ASE Social Enterprise Co., Ltd., and ASE Global Integrated Solutions Co., Ltd. ASEH’s main manufacturing facilities are located in Taiwan, the P.R.C., South Korea, Japan, Singapore, Malaysia, the Philippines, Vietnam, Mexico, America, Poland, France, the United Kingdom, Germany, Tunisia, the Czech Republic, and Hungary. Our principal executive offices are located at 26, Chin 3rd Road, Nanzih District, Kaohsiung, Taiwan, R.O.C. and our telephone number at the above address is (886-7) 361-7131. Our Common Shares have been listed on the TWSE under the symbol “3711” and ADSs representing our Common Shares have been listed on the NYSE under the ticker symbol “ASX.” In 2024, we completed the acquisition of 100% shareholdings of ASEPCAYMAN and CHE. In January 2026, we obtained control over EugenLight Technologies. 27 Table of Contents We are subject to the informational requirements of the Exchange Act and are required to file reports and other information with the SEC. The SEC maintains a website at www.sec.gov that contains reports, proxy and information statements, and other information regarding registrants that make electronic filings with the SEC using its EDGAR system. We also make available on our website’s investor relations page, free of charge, our annual report and the text of our reports on Form 6-K, including any amendments to these reports, as well as certain other SEC filings, as soon as reasonably practicable after they are electronically filed with or furnished to the SEC. The address for our investor relations page is https://ir.aseglobal.com/html/index.php. The information contained on our website is not incorporated by reference in this annual report. SPIL Acquisition In light of the increase in competition and the consolidation trends in the global semiconductor industry, ASE proposed a strategic plan to SPIL that involved consolidating the operations of the two companies. In 2015, ASE started purchasing SPIL shares through concurrent tender offers in the R.O.C. and the U.S. In 2016, ASE entered into the Joint Share Exchange Agreement with SPIL, pursuant to which ASEH was formed by means of a statutory share exchange pursuant to the laws of the Republic of China, and ASEH (i) acquired all issued shares of ASE in exchange for shares of ASEH, and (ii) acquired all issued shares of SPIL using cash consideration. The Share Exchange consummated on April 30, 2018, and ASE and SPIL became privately held and wholly owned subsidiaries of ASEH concurrently. Moreover, ASE and SPIL were separately approved by the competent authority to terminate their public offerings in March and April 2024. USI Group and USI Group Restructuring USI Group engages primarily in EMS in relation to computing, consumer electronics, communications, industrial and automotive, among other services and businesses. We have been purchasing shares of Universal Scientific Industrial since 1999. In 2010, upon several acquisitions through cash and stock tender offer, Universal Scientific Industrial became our subsidiary. In 2012, USI Shanghai completed its IPO on the Shanghai Stock Exchange with the symbol “601231.” In 2015, Universal Scientific Industrial completed a spin-off from USI Inc. In 2016, following the completion of a series of share transfers, USI Inc. became the parent company of the USI Group. In 2018, as a result of a series of organizational changes including spin-offs and mergers, ASEH directly controlled USI Inc. In 2020 and 2023, USI Shanghai completed the acquisition of FAFG and Hirschmann, respectively. In 2025, USI Group restructured Hirschmann, which became indirectly held by USI Inc. China Site Dispositions In 2021, ASEH and Beijing Wise Road Asset Management Co., Ltd. (the “Wise Road Capital”) entered into a Sale and Purchase Agreement by which ASEH to sell shares and equity interests in GAPT Holding Limited (GAPT Holding Limited directly or indirectly holds 100.0% equity interests in Global Advanced Packaging Test (HongKong) Limited, ASEWH, ASEN and Advanced Shanghai) and ASEKS to Wise Road Capital or its designated affiliate in exchange for a cash consideration in an aggregate amount of NT$36,939.1 million. In March 2023, the board of directors of GAPT resolved to acquire around 19.0% shareholding of Hong Kong United Ascend Holdings Limited. In January 2024, this resolution was amended to acquire 16.48% shareholding instead. The payment of all consideration was made with the remaining proceeds (US$380.0 million) from the disposal of subsidiaries in 2021 and the transaction was completed in September 2024. For more information on our history and development, see “—Organizational Structure.” BUSINESS OVERVIEW ASEH is a leading provider of semiconductor manufacturing services in assembly and testing. Our services include semiconductor packaging, production of interconnect materials, front-end engineering testing, wafer probing, and final testing services, as well as integrated solutions for EMS in relation to computing, peripherals, communications, industrial, automotive, and server applications. 28 Table of Contents We believe that, as a result of the following strengths, we are able to compete effectively to meet customers’ requirements across a wide range of applications: • our ability to provide a broad range of cost-effective semiconductor packaging and testing services on a large-scale turnkey basis within key centers of semiconductor manufacturing; • our expertise in developing and providing cost-effective packaging, interconnect materials, and testing technologies and solutions; • our ability to provide proactive original design manufacturing services using innovative solution-based designs; • our commitment to investing in capacity expansion and research and development, as well as selective acquisitions, that will benefit customers and our business; • our geographic presence in key centers of outsourced semiconductor and electronics manufacturing; and • our long-term relationships with providers of complementary semiconductor manufacturing services, including our strategic alliance with TSMC. We believe that it is still the trend for semiconductor companies to outsource their packaging, testing, and manufacturing requirements as semiconductor companies rely on independent providers of foundry, packaging and testing, and EMS. In response to the increased pace of new product development and shortened product life and production cycles, semiconductor companies are increasingly seeking both independent packaging and testing companies that can provide turnkey services that reduce time to market and electronic manufacturing companies with proactive original design capabilities that can provide large-scale production. We believe that our technological expertise, scale, and our ability to integrate a broad range of solutions into turnkey services and EMS allow us to benefit from the accelerated outsourcing trend and better serve our existing and potential customers. We believe that we have benefited, and will continue to benefit, from our geographic location in Taiwan. Taiwan is currently the largest center for outsourced semiconductor manufacturing in the world and has a high concentration of EMS providers. Our close proximity to foundries and other providers of complementary semiconductor manufacturing services is attractive to our customers who wish to take advantage of the efficiencies of a total semiconductor manufacturing solution by outsourcing several stages of their manufacturing requirements. We believe that, as a result, we are well positioned to meet the advanced semiconductor engineering and manufacturing requirements of our customers. Industry Background General Semiconductors are the building blocks used to create an increasing variety of electronic products and systems. Continuous improvements in semiconductor process and design technologies have led to smaller, more complex, and more reliable semiconductors at a lower cost per function. These improvements have resulted in significant performance and price benefits to manufacturers of electronic products. As a result, semiconductor demand has grown substantially in our primary end-user markets for communications, computing and consumer electronics, and has experienced increased growth in other markets such as automotive products, industrial automation and control systems. The semiconductor industry is characterized by strong long-term growth, with periodic and sometimes severe cyclical downturns. The Semiconductor Industry Association reported that worldwide sales of semiconductors increased from approximately US$51.0 billion in 1990 to approximately US$791.7 billion in 2025. We believe that overall growth and cyclical fluctuations will continue over the long term in the semiconductor industry. EMS EMS providers generally achieve significant economies of scale in manufacturing by leveraging shared product design expertise and offering value-added services such as warranties and repairs. Companies that do not require continuous production have increasingly outsourced their manufacturing to these providers, enabling such companies to respond quickly and efficiently to sudden demand surges and latest market trends without maintaining large inventories. 29 Table of Contents EMS are sought by companies in a wide range of industries including, among others, information, communications, computing, consumer electronics, automotive electronics, medical treatment, industrial applications, aviation, navigation, national defense, and transportation. Although affected by global economic fluctuations, we expect the EMS industry to continue to grow in the long term, and we have enhanced our presence in the industry through USI Group. Outsourcing Trends in Semiconductor Manufacturing Historically, semiconductor companies designed, manufactured, packaged, and tested semiconductors primarily within their own facilities. However, there is a noticeable industry trend to outsource the manufacturing process. Virtually every significant stage of manufacturing can now be outsourced, with wafer foundry services, semiconductor packaging and testing services, and EMS comprising the largest segments of the independent semiconductor manufacturing services market. The availability of technologically advanced independent manufacturing services has also enabled the growth of “fabless” semiconductor companies, focusing on design and marketing while outsourcing wafer fabrication, packaging, and testing to independent companies. We believe that the growth in the number and scale of fabless semiconductor companies that rely solely on independent manufacturers will continue to drive our growth. Similarly, the availability of technologically advanced independent manufacturing services has encouraged IDMs, traditionally reliant on in-house manufacturing, to increasingly outsource their manufacturing requirements to independent semiconductor manufacturing companies. We anticipate a rise in semiconductor manufacturing outsourcing in the future due to several factors, including technological expertise, significant capital expenditure, focus on core competencies, and time-to-market pressure. Trends of Mergers and Acquisitions in the Semiconductor Industry The global semiconductor industry is highly competitive, and the competitive landscape is changing as a result of a trend toward consolidation within the industry. Packaging and testing service providers, in particular, have engaged in cross-border mergers and acquisitions in recent years as part of their expansion strategy, which have gradually changed the ecosystem of the semiconductor industry. Examples of mergers and acquisitions by and among semiconductor design companies, integrated device and chips manufacturers, and software business providers include Intel’s acquisition of Altera, ON Semiconductor’s acquisition of Fairchild, NXP Semiconductors’s acquisition of Freescale Semiconductor, Avago Technologies’s acquisition of Broadcom, Infineon’s acquisition of Cypress, NXP Semiconductors’s acquisition of Marvell’s Wi-Fi Connectivity Business, NVIDIA’s acquisition of ARM Limited, Analog Devices’s acquisition of Maxim Integrated Products, AMD’s acquisition of Xilinx, Broadcom’s acquisition of VMware, Silver Lake’s acquisition of Altera, and Qualcomm’s acquisition of Alphawave Semi. Examples of mergers and acquisitions by and among semiconductor packaging and testing companies include Jiangsu Changjiang Electronics Technology’s acquisition of STATS ChipPAC, Nantong Fujitsu Microelectronics’s acquisition of the packaging and testing factory of AMD, Amkor’s acquisition of J-Devices, and Tianshui Huatian Technology’s acquisition of Unisem. Throughout our history, we have similarly undertaken several mergers and acquisitions, including the acquisitions of SPIL Group, Motorola’s semiconductor assembly and test sites, ISE Labs, EEMS Test Singapore, and Infineon’s manufacturing subsidiaries in the Philippines and South Korea. As a result of the aforementioned mergers and acquisitions, we and our competitors were able to further strengthen our competitive position by expanding product offerings and combining financial resources. We expect this consolidation trend to continue. 30 Table of Contents Overview of Semiconductor Manufacturing Process The manufacturing of semiconductors is a complex process that requires increasingly sophisticated engineering and manufacturing expertise. The manufacturing process can be generally divided into the following stages: We are involved in all stages of the semiconductor manufacturing process except circuit design and wafer fabrication. Process Description 1. Circuit Design The design of a semiconductor is developed by laying out circuit components and interconnections. 2. Engineering Test Throughout and following the design process, prototype semiconductors undergo engineering testing, which involves software development, electrical design validation, and reliability and failure analysis. 3. Wafer Fabrication Process begins with the generation of a photomask through the definition of the circuit design pattern on a photographic negative, known as a mask, by an electron beam or laser beam writer. These circuit patterns are transferred to the wafers using various advanced processes. 4. Wafer Probe Each individual die is electrically tested, or probed, for defects. Dies that fail this test are marked to be discarded. 5. Packaging (or Assembly) Packaging, also called assembly, is the processing of bare semiconductors into finished semiconductors and serves to protect the die and facilitate electrical connections and heat dissipation. 6. Final Test Final testing is conducted to ensure that the packaged semiconductor meets performance specifications. Final testing involves using sophisticated testing equipment, known as testers, and customized software to electrically test several attributes of packaged semiconductors, including functionality, speed, predicted endurance, and power consumption. The final testing of semiconductors is categorized by the functions of the semiconductors tested into logic/mixed-signal/RF/3D IC/discrete final testing and memory final testing. Memory final testing typically requires simpler test software but longer testing time per device tested. 31 Table of Contents Process Description 7. Module, Board Assembly, and Test Module, board assembly, and test refers to the combination of one or more packaged semiconductors with other components in an integrated module or board to enable increased functionality. 8. Material Material refers to the interconnection of materials which connect the input/output on the semiconductor dies to the printed circuit board, such as substrate, leadframe, and flip chip. Strategy Our objective is to provide integrated solutions that set industry standards, including packaging, testing services, interconnect materials design and production capabilities, and to lead and facilitate the industry trend toward outsourcing semiconductor manufacturing requirements. The principal elements of our strategy are to: Grow Our Packaging and Testing Services and Expand Our Range of Offerings We believe that an important factor in attracting leading semiconductor companies to be our customers is our ability to fulfill the demand for a broad range of packaging and testing solutions on a large scale. We intend to continue to develop process and product technologies to meet the packaging and testing requirements of clients. Our expertise in packaging technology has enabled us to develop sophisticated solutions such as 2.5D/FO-MCM/FO-EB/ CoWoS/CoPoS/CoWoP/CPO/3D IC, flip chip packaging, bump chip carrier packaging, stacked die packaging, leading-edge advanced packaging and fine-pitch wire bonding. We are continuously investing in research and development in response to and in anticipation of migrations in technology and intend to continue to acquire access to new technologies through strategic alliances and licensing arrangements. We have been expanding our semiconductor testing business in response to growing demand for comprehensive testing solutions in the semiconductor industry. By offering testing turnkey solutions, we enable semiconductor companies to shorten product cycle times and improve product quality. We remain committed to expanding our testing business to meet the evolving needs of customers worldwide. The increasing miniaturization of semiconductors and the growing complexity of interconnect technology have also resulted in the convergence of assembly processes at different levels of integration: chip, module, board, and system. In response to this miniaturization and growing complexity, we have focused on providing module assembly services and, in addition, USI Group has provided us with access to process and product technologies at the levels of module, board, and system assembly and testing, which helps us to better anticipate industry trends and take advantage of potential growth opportunities. We expect to continue to combine our packaging, testing, and materials technologies with the expertise of USI Group at the systems level to develop our SiP business. Strategically Expand and Streamline Production Capacity To capitalize on growing industry demand, we intend to strategically expand our production capacity, both through internal growth and selective acquisitions and joint ventures, with a focus on providing cost-competitive and innovative services. We intend to invest in trends that are essential to the development of the industry. We plan to expand our capacity to meet demand for smaller form factors, higher performance, and higher packaging density. We expect to focus on providing cost-competitive services through better management of capacity utilization and efficiency improvements and offer our services on a large scale with the intention of driving more IDM outsourcing in the long run. We evaluate acquisition and joint venture opportunities on the basis of access to new markets and technology, the enhancement of our production capacity, improvement of research and development capabilities, economies of scale and management resources, and closer proximity to existing and potential customers. For example, in 2023, we acquired HCC Group to expand our automotive wireless business, in 2024, we acquired Infineon Group’s manufacturing subsidiaries in the Philippines and South Korea to expand power chip module packaging and testing and lead frame packaging, and in March 2026, the board of directors of ASE Malaysia resolved to acquire Analog Devices’s manufacturing subsidiaries in Malaysia to enhance supply chain resilience and manufacturing diversity. 32 Table of Contents Continue to Leverage Our Presence in Key Centers of Semiconductor and Electronics Manufacturing We intend to continue leveraging our presence in key centers of semiconductor and electronics manufacturing to further grow our business. We have significant packaging, testing, and EMS operations in Taiwan, currently one of the leading centers for outsourced semiconductor and electronics manufacturing in the world. This presence enables our engineers to work closely with our customers as well as wafer foundries and other providers of complementary semiconductors and EMS early in the design process, enhances our responsiveness to the requirements of our customers, and shortens production cycles. In addition, as a turnkey service provider, we are able to offer our products to our customers and complementary service providers within relatively close geographic proximity. Besides our current operations in Taiwan, we intend to expand our operations in our other subsidiaries outside of Taiwan. In addition to Taiwan, we have major operations in the following locations: • P.R.C. — a fast-growing market for semiconductor and electronics manufacturing; • South Korea — an important center for the manufacturing of memory and communications devices; • Malaysia, Singapore, the Philippines and Vietnam — each a center for outsourced semiconductor and electronics manufacturing in Southeast Asia; • Silicon Valley in California — the preeminent center for semiconductor design, with a concentration of fabless customers; • Japan — an emerging market for packaging and testing outsourcing services as Japanese IDMs increasingly outsource their semiconductor manufacturing requirements; • Mexico — a development and manufacturing center for electronic products across different industries with an auxiliary service depot to provide technical services; and • Europe — an original equipment manufacturing solutions center for the electronics industry that continues to grow, driven by the increasing demand for cost-competitive and flexible manufacturing solutions in various industries. Strengthen and Develop Strategic Relationships with Our Customers and Providers of Complementary Semiconductor Manufacturing Services We intend to strengthen existing and develop new strategic relationships with our customers and providers of complementary semiconductor manufacturing services, such as wafer foundries, as well as equipment vendors, raw material suppliers, and technology research institutes, in order to offer our customers total semiconductor manufacturing solutions covering all stages of the manufacturing process from design to shipment. In addition, we are working with our customers to co-develop new packaging technologies and designs. Since 1997, we have maintained a strategic alliance with TSMC, which designates us as their non-exclusive preferred provider of packaging and testing services for semiconductors manufactured by TSMC. Through our strategic alliance with and close geographic proximity to TSMC, we are able to offer our customers a total semiconductor manufacturing solution that includes access to foundry services in addition to our packaging, testing, and direct shipment services. Principal Products and Services We offer a broad range of semiconductor packaging and testing services. In addition, we provide EMS through USI Group. Our package types generally employ either leadframes or substrates as interconnect materials. The semiconductors we package are used in a wide range of end-use applications, including communications, computing, consumer electronics, industrial, automotive, and other applications. Our testing services include front-end engineering testing, which is performed during and following the initial circuit design stage of the semiconductor manufacturing process, wafer probe, final testing, and other related semiconductor testing services. We focus on packaging and testing semiconductors. We offer our customers turnkey services, which consist of packaging, testing, and direct shipment of semiconductors to end users designated by our customers. Our EMS are used in a wide range of end-use applications, including, but not limited to, computing, peripherals, communications, industrial applications, automotive electronics, and server applications. In 2025, our revenues generated from packaging, testing, and EMS accounted for 47.8%, 11.1% and 39.9% of our operating revenues, respectively. 33 Table of Contents Packaging Services We offer a broad range of package types to meet the requirements of our customers, including flip chip BGA, flip chip CSP, aCSP (advanced chip scale packages), quad flat packages (QFP), low profile and thin quad flat packages (LQFP/TQFP), bump chip carrier (BCC), quad flat no-lead (QFN) packages, aQFN (advanced QFN), and Plastic BGA. In addition, we provide 3D chip packages, such as aMAP POP (advanced, laser ablation type), which enable our customers to mount packages more easily, and HB PoP (High-Band package on Package) for higher performance orientation and marketing requirement. We also offer other forms of stacked die solutions in different package types, such as stacked die QFN, hybrid BGAs containing stacked wire bond, and FC die. Meanwhile, we are developing cost-effective solutions to 3D packages, such as FOCoS (Fan-out Chip-on-Substrate) and 2.5D (silicon interposer), to fulfill current low-cost and high-performance requirements in parallel with 3D IC with TSV (Through Silicon Via) technology. In addition, to meet current trends toward low-cost solutions, we provide gold, copper, and silver wire bonding solutions which can be applied to traditional gold wire products. We also provide a high-volume manufacturing experience with silver wire bonding for FCCSP Hybrid packages. Furthermore, we are one of the key providers of IoT (Internet of Things), server and automotive services. We believe we are among the leaders in such packaging processes and technologies and are well positioned to lead the technology migration in the semiconductor packaging industry. Wirebonding. We provide wirebonding, including leadframe-based packages and substrate-based packages. Leadframe-based packages are packaged by connecting the die, using wire bonders, to the leadframe with gold wire or copper wire. As packaging technology improves, the number of leads per package increases. In addition, improvements in leadframe-based packages have reduced the footprint of the package on the circuit board and improved the electrical performance of the package. To have higher interconnected density and better electrical performance, semiconductor packages have evolved from leadframe-based packages to substrate-based packages. The key differences of these package types are the size of the package; the density of electrical connections the package can support; flexibility at lower costs; the thermal and electrical characteristics of the package; and environmentally conscious designs. Substrate-based packages generally employ the BGA design. Whereas traditional leadframe technology places the electrical connection around the perimeter of the package, the BGA package type places the electrical connection at the bottom of the package surface in the form of small bumps or balls. These small bumps or balls are typically distributed evenly across the bottom surface of the package, allowing greater distance between individual leads and higher pin-counts. Our expertise in BGA packages also includes capabilities in stacked-die BGA, which assembles multiple dies into a single package. The following table sets forth our principal wirebonding packages. Package Types Number of Leads Description End-Use Applications Advanced Quad Flat No-Lead Package (aQFN) 104-276 aQFN allows for leadless, multi-row, and fine-pitch lead frame packaging and is characterized by enhanced thermal and electrical performance. aQFN is a cost-effective packaging solution due to its cost-effective materials and simpler packaging process. Telecommunications products, wireless local access networks, personal digital assistants, digital cameras, low to medium lead count packaging information appliances. Quad Flat Package (QFP)/Low 44-256 profile and Thin Quad Flat Package (LQFP/TQFP) 44-256 Designed for advanced processors and controllers, application-specific integrated circuits, and digital signal processors. Multimedia applications, cellular phones, personal computers, automotive and industrial products, hard disk drives, communication boards such as ethernet, integrated services digital networks, and notebook computers. Quad Flat No-Lead Package (QFN)/ Dual-Row QFN (DR-QFN)/ Microchip Carrier (MCC) 8-176 QFN/DRQFN, also known as types of MCC, uses half-encapsulation technology to expose the rear side of the die pad and the tiny fingers, which are used to connect the chip and bonding wire with printed circuit boards. Dual-Row is to increase the lead counts for product requirement. Cellular phones, wireless local access networks, personal digital assistant devices, and digital cameras. 34 Table of Contents Package Types Number of Leads Description End-Use Applications Small Outline Plastic Package (SOP)/Thin Small Outline Plastic Package (TSOP) 8-56 Designed for memory devices including static random access memory, or SRAM, dynamic random access memory, or DRAM, fast static RAM, also called FSRAM, and flash memory devices. Consumer audio/video and entertainment products, cordless telephones, pagers, fax machines, printers, copiers, personal computer peripherals, automotive parts, telecommunications products, recordable optical disks, and hard disk drives. Small Outline Plastic J-Bend Package (SOJ) 20-44 Designed for memory and low pin-count applications. DRAM memory devices, microcontrollers, digital analog conversions, and audio/video applications. Plastic Leaded Chip Carrier (PLCC) 28-84 Designed for applications that do not require low-profile packages with high density of interconnects. Personal computers, scanners, electronic games, and monitors. Plastic Dual In-line Package (PDIP) 8-64 Designed for consumer electronic products. Telephones, televisions, audio/video applications, and computer peripherals. Plastic BGA 119-1520 Designed for semiconductors which require the enhanced performance provided by plastic BGA, including personal computer chipsets, graphic controllers and microprocessors, application-specific integrated circuits, digital signal processors, and memory devices. Telecommunications products, global positioning systems, notebook computers, disk drives, and video cameras. Stacked-Die BGA 120-1520 Combination of multiple dies in a single package enables package to have multiple functions within a small surface area. Telecommunications products, local area networks, graphics processor applications, digital cameras, and pagers. Package-on-Package (POP, aMAP POP) 136-904 This technology places one package on top of another to integrate different functionalities while maintaining a compact size. It offers procurement flexibility, low cost of ownership, better total system cost and faster time to market. Designers typically use the topmost package for memory applications and the bottommost package for ASICs. By using this technology, the memory known good die issue can be mitigated and the development cycle time and cost can be reduced. Cellular phones, personal digital assistants, and system boards. Land Grid Array (LGA) 10-72 Leadless package, which is essentially a BGA package without the solder balls. Based on laminate substrate, land grid array packages allow flexible routing and are capable of multichip module functions. High-frequency integrated circuits such as wireless communications products, computers servers, personal computer peripherals, and MEMS sensors. Advanced Packages. The semiconductor packaging industry has evolved to meet the requirements of high-performance electronics products. We believe that there will be growing demand for packaging solutions with increased input/output density, smaller size, and a better heat dissipation characteristic. We have focused on developing our capabilities in certain packaging solutions, such as aCSP (wafer-level chip scale package), flip chip BGA, Heat-Spreader FCBGA, flip-chip CSP, Hybrid FCCSP (Flip Chip + W/B), Flip Chip PiP (Package in Package), Flip Chip PoP (Package on Package), aS3TM (Advanced Single Sided Substrate), HB POP (High-Bandwidth POP), and SESUB. Flip-chip BGA technology replaces wire bonding with wafer bumping for interconnections within the package. Wafer bumping involves the placing of tiny solder balls, instead of wires, on top of dies for connection to substrates. As compared with more traditional packages, which allow input/output connection only on the boundaries of the dies, flip chip or wafer-level package solutions significantly enhance the input/output flow by allowing input/output connections over the entire surface of the dies. 35 Table of Contents Chip scale packages typically have an area no greater than 120% of the silicon die. For wafer-level packages, the electrical connections are plated or printed directly onto the wafer itself, resulting in a package very close to the size of the silicon die. Wafer-Level MEMs (WL MEMs) is an advanced assembly technology for MEMs in wafer-level types instead of current LGA or leadframe types using TSV or chip-to-wafer technology. WL MEMs are mainly used in applications such as pressure, temperature, humidity, and gyroscope sensors, among others. We provide numerous technologies to meet various customer demands. The following table sets forth our principal advanced packages. Package Types Number of Leads Description End-Use Applications Wafer-Level Chip Scale Package (aCSP) 4-792 A wafer-level chip scale package that can be directly attached to the circuit board. Provides shortest electrical path from the die pad to the circuit board, thereby enhancing electrical performance. Cellular phones, personal digital assistants, watches, MP3 players, digital cameras, and camcorders. Flip Chip Scale Package (FC-CSP,a-fcCSP) 16-1287 A lightweight package with a small, thin profile provides better protection for chips and better solder joint reliability than other comparable package types. RFICs and memory ICs such as digital cameras, DVDs, devices that utilize wireless technology, cellular phones, GPS devices, and personal computer peripherals. Flip Chip PiP (Package in Package) (FC-CSP PiP) 500-980 System-in-Package for Flip Chip + Memory known good package inside with better electrical performance package types. Application processor for smartphone and data modem on portable devices. Flip Chip PoP (Package on Package) (FC-CSP PoP) 500-1300 SoC (System-on-Chip) die for Assembly to Bottom package and then applied for memory package on top inside with better electrical performance package types. High-tier application processor for smartphones and data modem on portable devices. Flip Chip BGA/ HFCBGA (High Performance / Heat Spreader / FCBGA) 16-5475 Using advanced interconnect technology, the flip chip BGA packages allow higher density of input/output connection over the entire surface of the dies. HFCBGA is designed for the semiconductor high-performance requirement of high density of interconnects. High-performance networking, graphics, server, and data center processor applications. Hybrid (Flip Chip and Wire Bonding) 49-608 A package technology that stacks a die on top of a probed known good die to integrate ASIC and memory (flash, SRAM, and DDR) into one package and interconnects them with wire bonding and molding. This technology suffers from known good die issues (i.e., one bad die will ruin the entire module). Rework is also not an option in hybrid packages. Digital cameras, smartphones, bluetooth applications, and personal digital assistants. aS3 up to 300 Ultra-thin profile package which is an excellent middle pin-count alternative solution; standard BT material and manufacturing equipment; and lower cost via on pad. High I/O and short wire length package solution in high-performance requirement. Integrated Passive Device (IPD) ~ 20 IPD can provide a high-performance/high Q-factor inductor and single/double layers for lower cost and turnkey solutions and integrate passives into one IPD chip. IPD requires less involvement in the Surface Mount Technology (the “SMT”) process and is considered to be more compatible with current assembly process and suitable for all package solutions. Cellular phones, Wi-Fi module, TV, and personal digital assistants. HBPoP (High-Bandwidth Package On Package) ~ 1300 High-Bandwidth POP can provide a data rate and good signal integrity for Cellular AP, an integration solution for ASIC and memory, decoupling functions for multiple memory mount applications. Cellular phones and application processors. 36 Table of Contents Heterogeneous Integration. Heterogeneous Integration refers to the integration of separately manufactured components into a higher-level assembly that, in the aggregate, provides enhanced functionality and improved operating characteristics: • SiP and Modules. The drive towards semiconductor miniaturization and integration is expanding the commercial potential of SiP, a package or module containing a functional electronic system or subsystem that is integrated and miniaturized through IC greater assembly technologies. With attributes that deliver higher performance, cost-effectiveness, and shorter time to market, SiP technology is enabling functionality and creating more commercial opportunities across a broader variety of electronics applications. ASEH is a market leader in SiP technologies from design to assembly with high-volume manufacturing. SiP involves the integration of multiple components from IC chips and components including ASICs, Memory, Analog & mixed signals devices, passives, MEMs, sensors, antennas, and other devices into one single package. SiP and Modules products are gaining significant traction within the industry, given growing demand for miniaturized electronic devices that deliver more functions and higher performance, lower power, greater speed, and increased bandwidth. ASEH’s SiP portfolio includes flip chip and wirebond multichip packaging, embedding technologies such as SESUB, and wafer-level technologies including fan-out and IPD. IPD uses a wafer-level process to integrate passive components on an individual substrate. Recent IPD innovation involves the extension of the RDL (Redistribution) process to build a high-quality factor (Q) inductor and RF circuits on top of silicon wafers. It can be used in the following three approaches to enhance product performance: 1) replace discrete components such as Balun and Filter, 2) integrate other passive components and act as interposer, and 3) replace PWB and act as a substrate of the module. In addition, we leverage some of our SMT-based technologies, such as compartment shielding, double-sided module, and antenna integration. We also offer module assembly services, which combine one or more packaged semiconductors with other components in an integrated module to enable increased functionality for system-level assembly. End-use applications for modules include cellular phones and wireless LAN applications, Bluetooth applications, camera modules, automotive applications, toys, networking, storage, and power management. • Leading-Edge Advanced Packages. As AI and HPC continue to make inroads on a global basis, we believe there is an increased demand for semiconductor devices that deliver enhanced performance, lower latency, increased bandwidth, and greater power efficiency. ASEH strives to meet the increasing package complexity needs related to increasing I/O density, expanding power delivery requirements and providing more robust inter-die connectivity from AI & HPC products. We have established ourselves as a leader through the successful introduction of leading-edge advanced packaging solutions, which have played a pivotal role in bringing advanced ASIC and HBM products to the marketplace. We define leading-edge advanced packages as packaging technologies that incorporate redistribution layer (RDL) processes. By leveraging RDL processes, embedded integration, and 2.5D and 3D technologies, these packaging solutions facilitate unprecedented innovation in integrating multiple chips within a single package. Notable technologies include ASEH’s FOWLP (Fan-Out Wafer-Level Package), high-density RDL-based Fanout Package-on-Package (FOPoP), Fanout Chip-on-Substrate (FOCoS), Fanout Chip-on-Substrate-Bridge (FOCoS-Bridge), Fanout System-in-Package (FOSiP), Through Silicon Via (TSV)-based 2.5D and 3D IC, along with Co-Packaged Optics processing capabilities. Our comprehensive technology toolbox provides customers with the capabilities necessary to develop highly integrated silicon packaging solutions, optimizing clock speed, bandwidth, and power delivery, while reducing co-design time, product development cycles, and time to market. The following table sets forth our leading-edge advanced packaging technologies. 37 Table of Contents Package Types Number of Leads Description End-Use Applications FOWLP (Fan-Out Wafer-Level Package) ~ 1500+ FOWLP provides an extended solution/package type to integrate most different functional chips or packages and to have good reduction in resistance and inductance over FCCSP, better thermal performance and smaller form factors of packages, and can be applied for different stack or SiP solutions. Cellular phones, logic devices, power management, RF, Codec, IoT, wearables, and networking. Fanout Package-on-Package (FOPoP) 1520 An RDL-based package that integrates a fan-out bottom package with a standard package mounted on the top side, utilizing fine-pitch plated Cu posts for through-mold vertical interconnections. The bottom package features two RDLs (top and bottom routing planes) connected by the Cu posts, formed through wafer-level fan-out technology, enabling thinner and finer electrical traces. Application processors for smartphone and antenna-in-packages for mobile/automotive. Fanout Chip-on-Substrate (FOCoS) 3000-7000 A fan-out package flip-chip mounted on a high pin count BGA substrate. It incorporates an RDL facilitating shorter die-to-die interconnections between multiple chips. ASICs and HBM for HPC, networking, server and AI/ML applications. Fanout Chip-on-Substrate-Bridge (FOCoS-Bridge) 3000-14000 FOCoS—Bridge further utilizes tiny silicon bridge with routing layers as in-package interconnect between chiplets. The silicon bridges are embedded in the fan-out RDL layer to achieve faster data transfer rates. Multi-die and HBM integration for AI, data center, server and networking applications. Memory and passive integration for APU/CPU/GPUs and chiplets for applications across AI, data center, mobile, auto processors, communication infrastructure, and networking. Fanout System-in-Package (FOSiP) Customized FOSiP can achieve higher performance and smaller form factor through fan-out RDL. Smartphones, tablets, RF infrastructures, edge computing, and IoT devices. 2.5D and 3D IC 3000-14000 2.5D/3D include multiple IC within the same package. In a 2.5D structure, two or more active semiconductor chips are placed side-by-side on a silicon interposer to achieve extremely high die-to-die interconnect density. In a 3D structure, active chips are integrated through die stacking to achieve shortest interconnects and smallest package footprint. High-end GPUs, high-end FPGA, network switch / routers for data center & 5G infrastructure, AI accelerators for AI training. Co-Packaged Optics 3000-14000 CPO/silicon photonics serve as a conduit for light propagation and leverage the established CMOS ecosystem, encompassing front-end and back-end processes, to realize high-density photonic integrated circuits. This approach enables the implementation of intricate optical functionalities, such as filtering or modulation, on a compact chip at a low cost. ASICs on network switch and stand-alone laser engine for high speed. Interconnect Materials. Interconnect materials connect the input/output on the semiconductor dies to the printed circuit board. Interconnect materials include substrate, which is a multilayer miniature printed circuit board, and is an important element of the electrical characteristics and overall performance of semiconductors. We produce substrates for use in our packaging operations. The demand for higher-performance semiconductors in smaller packages will continue to spur the development of IC substrates that can support the advancement in circuit design and fabrication. As a result, we believe that the market for substrates will grow and the cost of substrates as a percentage of the total packaging process will increase. In the past, substrates we designed for our customers were produced by independent substrate manufacturers. Since 1997, we have been designing and producing a portion of our interconnect materials in-house. In 2025, our interconnect materials operations supplied approximately 8.7% of our consolidated substrate requirements by value. The following table sets forth, for the periods indicated, the percentage of our packaging revenues accounted for by each principal type of packaging products or services. 38 Table of Contents Year Ended December 31, 2023 2024 2025 Bumping, Flip Chip, WLP, and SiP 51.3% 54.6% 59.6% Wirebonding(1) 39.8% 36.3% 32.9% Discrete and others 8.9% 9.1% 7.5% Total 100.0% 100.0% 100.0% (1) Includes leadframe-based packages such as QFP/TQFP, QFN/MCC and PLCC/PDIP and substrate-based packages, such as various BGA package types and LGA. Testing Services We provide a complete range of semiconductor testing services, including front-end engineering testing, wafer probing, final testing of logic/mixed-signal/RF semiconductors and SiP/MEMS/Discrete modules, and other test-related services. The testing of semiconductors requires technical expertise and knowledge of the specific applications and functions of the semiconductors tested as well as the testing equipment utilized. We believe that our testing services employ technology and expertise which are among the most sophisticated in the semiconductor industry. In addition to maintaining different types of testing equipment, which enables us to test a variety of semiconductor functions, we work closely with our customers to design effective testing solutions on multiple equipment platforms. In recent years, complex, high-performance logic/mixed-signal/RF semiconductors, including AI processor/switch, automotive ADAS chips and SiP/MEMS modules, have accounted for an increasing portion of our testing revenues. Front-End Engineering Testing. We provide front-end engineering testing services, including customized software development, electrical design validation, and reliability and failure analysis. • Customized Software Development. Test engineers develop customized software or test programs to test semiconductors using automated test equipment. Each device generally requires a specialized test program in order to test the conformity of each particular semiconductor to its required functionality and specification. • Electrical Design Validation. A prototype of the designed semiconductor is subjected to electrical tests using advanced test equipment and customized software. These tests assess whether the prototype semiconductor complies with a variety of different operating specifications, including functionality, frequency, voltage, current, timing, and temperature range. • Reliability Analysis. Reliability analysis is designed to assess the long-term reliability of the semiconductor and its suitability of use for intended applications. Reliability testing can include “burn-in” services, which electrically stress a device, usually at high temperature and voltage, for a period of time long enough to cause the failure of marginal devices. • Failure Analysis. In the event that the prototype semiconductor does not function to specifications during either the electrical design validation or reliability testing processes, it is typically subjected to failure analysis to determine the cause of the failure to perform as anticipated. As part of this analysis, the prototype semiconductor may be subjected to a variety of analyses of electrical testing. Wafer Probing. Wafer probing is the step immediately before the packaging of semiconductors and involves visual inspection and electrical testing of the processed wafer for defects to ensure that it meets our customers’ specifications. Wafer probing services require expertise and testing equipment similar to that used in final testing, and most of our testers can also be used for wafer probing. Logic/Mixed-signal/RF Module and SiP/Discrete Final Testing. We conduct final tests of a wide variety of logic/mixed-signal/RF semiconductor devices and SiP/MEMS/discrete modules, with the number of leads or bumps ranging from the single digits to over 30 thousand and operating frequencies of over 44 Gbps for digital semiconductors and 44 GHz for satellites and 5G mm Wave semiconductors, which are at the high end of the range for the industry. The products we test include applications for wired, wireless, and mobile communications, satellite communications, automotive, home entertainment, IoT, personal computer, AI, and HPC applications, as well as a variety of consumer and application-specific integrated circuits for various specialized applications. 39 Table of Contents Other Test-Related Services. We provide a broad range of additional test-related services, such as: • Electric Interface Board and Mechanical Test Tool Design. Process of designing individualized testing apparatuses such as test load boards, sockets, handler change kits, and probe cards for unique semiconductor devices and packages. • Program Conversion. Process of converting a test program from one test platform to different test platforms. • Program Efficiency Improvement. Process of optimizing the program code. • Burn-In Testing. Burn-in testing is the process of electrically stressing a device, usually running at high temperatures and voltages, for a period of time to simulate the continuous use of the device to determine whether this use would cause failures. • Module and SiP Testing. We provide multi-die-module and SiP testing through integrated bench solutions or via automatic test equipment. • System Level Testing. We provide customized system-level testing as a device functional simulation test solution, offering higher test coverage after the final test. Drop Shipment Services. We offer drop shipment services for shipment of semiconductors directly to end users designated by our customers. Drop shipment services are provided mostly in conjunction with our testing services. We provide drop shipment services to a significant percentage of our testing customers. A substantial portion of our customers at each of our facilities have qualified these facilities for drop shipment services. Since drop shipment eliminates the additional step of inspection by the customer before shipment to the end user, quality of service is a key consideration. We believe that our ability to successfully execute our full range of services, including drop shipment services, is an important factor in maintaining existing customers as well as attracting new customers. The following table sets forth, for the periods indicated, the percentage of our testing revenues accounted for by each type of testing services. Year Ended December 31, 2023 2024 2025 Front-end engineering testing 3.1% 2.0% 2.0% Wafer probing 35.4% 40.3% 44.0% Final testing 61.5% 57.7% 54.0% Total 100.0% 100.0% 100.0% EMS We provide integrated solutions for EMS in relation to computing, peripherals, communications, industrial, automotive, and server applications through USI Group. The key products and services we offer to our customers include: • Computing: motherboards for server and PCs; AI cards; peripherals; docking station; network attached systems; solid state drives; • Communications: Wi-Fi; SiP; • Consumer products: control boards for flat panel devices; SiP; 40 Table of Contents • Automotive electronics: automotive EMS; automotive wireless solutions; powertrain systems; power module; telematics; • Industrial products: point-of-sale systems; smart handheld devices; and • Others: field replacement units; return material authorization; medical/health related products. Seasonality See “Item 5. Operating and Financial Review and Prospects—Operating Results—Quarterly Operating Revenues, Gross Profit and Gross Margin.” Sales and Marketing Sales and Marketing Presence We maintain sales and marketing offices in Taiwan, the U.S., Belgium, Singapore, the P.R.C., South Korea, Malaysia, Japan, and a number of other countries. We also have sales representatives operating in certain other countries in which we do not have offices. Our sales and marketing offices in Taiwan are located in Hsinchu, Taichung and Kaohsiung. We conduct marketing research through our customer service personnel and through our relationships with our customers and suppliers we endeavor to keep abreast of market trends and developments. We also provide advice on production process technology to our major customers planning the introduction of new products. When placing orders, our customers specify which of our facilities will receive the orders. Our customers conduct separate qualification and correlation processes for each of our facilities that they use. See “—Qualification and Correlation by Customers.” Customers Our five largest customers together accounted for approximately 48.0%, 48.4% and 46.5% of our operating revenues in 2023, 2024, and 2025, respectively. One customer (including other customers for whom OEM services were provided on its behalf) accounted for more than 10.0% of our operating revenues in 2023, 2024, and 2025. We package and test for our customers a wide range of products with end-use applications in the communications, computing, and consumer electronics/industrial/automotive sectors. The following table sets forth a breakdown of the percentage of our operating revenues generated from our packaging and testing services, for the periods indicated, by the principal end-use applications of the products that were packaged and tested. Year Ended December 31, 2023 2024 2025 Communications 50.8% 50.9% 45.8% Computing 18.1% 18.1% 24.0% Consumer electronics/industrial/automotive/others 31.1% 31.0% 30.2% Total 100.0% 100.0% 100.0% Our EMS provides a wide range of products with end-use applications. The following table sets forth a breakdown of the percentage of our operating revenues generated from our EMS for the periods indicated by the principal end-use applications. Year Ended December 31, 2023 2024 2025 Communications 35.9% 34.7% 31.0% Computing 8.9% 10.1% 10.2% Consumer electronics 31.6% 31.7% 35.7% Industrial 13.3% 11.6% 12.8% Automotive 8.3% 9.8% 8.3% Others 2.0% 2.1% 2.0% Total 100.0% 100.0% 100.0% 41 Table of Contents We categorize our operating revenues geographically based on the country in which the customer is headquartered. The following table sets forth, for the periods indicated, the percentage breakdown by geographic regions of our operating revenues. Year Ended December 31, 2023 2024 2025 U.S. 63.6% 60.2% 56.7% Taiwan 12.1% 15.0% 18.0% Asia 13.0% 13.9% 15.2% Europe 11.2% 10.7% 10.0% Others 0.1% 0.2% 0.1% Total 100.0% 100.0% 100.0% Qualification and Correlation by Customers Customers generally require that our facilities undergo a stringent qualification process during which the customer evaluates our operations and production processes, including engineering, delivery control, and testing capabilities. The qualification process typically takes up to several weeks but can take longer depending on the requirements of the customer. In the case of our testing operations, after we have been qualified by a customer and before the customer delivers semiconductors to us for testing in volume, a process known as correlation is undertaken. During the correlation process, the customer provides us with sample semiconductors to be tested and either provides us with the test program or requests that we develop a conversion program. In some cases, the customer also provides us with a data log of results of any testing of the semiconductors that the customer may have conducted previously. The correlation process typically takes up to two weeks but can take longer depending on the requirements of the customer. We believe our ability to provide turnkey services reduces the amount of time spent by our customers in the qualification and correlation process. As a result, customers utilizing our turnkey services are able to achieve shorter production cycles. Pricing We price our packaging services and EMS by considering the actual costs and prevailing market prices. We price our testing services primarily on the basis of the amount of time, measured in central processing unit seconds, taken by the automated testing equipment to execute the test programs specific to the products being tested, as well as the cost of the equipment, with additional consideration of prevailing market prices. Prices for our packaging, testing, and EMS are confirmed at the time orders are received from customers, which is typically several weeks before delivery. 42 Table of Contents Raw Materials and Suppliers Packaging The principal raw materials used in our packaging processes are interconnect materials such as leadframes and substrates, gold wire, and molding compound. The silicon die, which is the functional unit of the semiconductor to be packaged, is supplied in the form of silicon wafers. Each silicon wafer contains a number of identical dies. We receive the wafers from customers or foundries on a consignment basis. Consequently, we generally do not incur inventory costs relating to the silicon wafers used in our packaging process. We do not maintain large inventories of leadframes, substrates, bonding wire, or molding compound, but generally maintain sufficient stock of each principal raw material based on blanket orders and rolling forecasts of near-term requirements received from customers. In addition, several of our principal suppliers dedicate portions of their inventories as reserves to meet our production requirements. However, shortages in the supply of materials experienced by the semiconductor industry have in the past resulted in occasional price adjustments and delivery delays. In order to reduce adverse impacts caused by the price fluctuations of raw materials, we have developed substitute raw materials, such as copper wire, which costs much less than gold wire. However, we cannot guarantee that we will not experience shortages or price increases in the near future, or that we will be able to obtain adequate supplies of raw materials in a timely manner and at a reasonable price or to develop any substitute raw materials. In the event of a shortage and/or price increase, we generally inform our customers and work together to accommodate changes in delivery schedules and/or the price increase of raw materials. See “Item 5. Operating and Financial Review and Prospects—Operating Results—Raw Material Costs.” We produce substrates for use in our packaging operations. In 2025, our interconnect materials operations supplied approximately 8.7% of our consolidated substrate requirements by value. See “—Principal Products and Services—Interconnect Materials.” We have adjusted our purchases of raw materials and our production processes in order to use raw materials that comply with EU regulations, such as EU RoHS and EU REACH, for part of our production. This legislation restricts the use in the EU of certain substances that the EU deems harmful to consumers including certain grades of molding compounds, solder, and other raw materials that are used in our products. Manufacturers of electrical and electronic equipment must comply with this legislation in order to sell their products in an EU member state. Any failure to comply with regulatory environmental standards may have a material adverse effect on our results of operations. We established ASE Global Integrated Solutions Co., Ltd. to manage and implement procurement processes for certain materials and equipment requirements. Leveraging the specialized expertise and advantages among certain subsidiaries, we aim to achieve significant cost reductions in the overall procurement process through the establishment of ASE Global Integrated Solutions Co., Ltd. Testing For the functional and burn-in testing of semiconductors, no other raw materials are needed. However, we often design and outsource the manufacturing of test interface products such as load boards, probe cards, system level test boards, burn-in boards and required kits. EMS Our manufacturing processes use many raw materials. For 2025, raw materials costs accounted for 78.7% of our operating revenues from EMS. Our principal raw materials include, among others, printed circuit boards, integrated chips, ink, semiconductor devices, computer peripherals, and related accessories and electronic components. Our principal raw materials varied in the past, depending on the end-use products provided. To ensure quality, on-time delivery and pricing competitiveness, we have established both a standardized supplier assessment system and an evaluation mechanism, continued to maintain close working relationships with our suppliers, and jointly created a stable and sustainable supply chain. In addition, we adjusted the procurement strategy in line with industry trends as well as the nature of raw materials, and decentralized the sources of raw materials to lower our supply concentration risk. However, we cannot ensure that we will not experience any shortages or price increases in the future. See “Item 3. Key Information—Risk Factors—Risks Relating to Our Business—Our revenues and profitability may decline if we are unable to obtain adequate supplies of raw materials and energy in a timely manner and at a reasonable price.” 43 Table of Contents Equipment Packaging The wire bonding process is important for routing the signal out of die to the system for the IC wire-bonding solutions. Thus, wire bonder is the key equipment used for such process. As products become finer and finer pitch, the bumping process will replace the wire bonding process for the signal routing purpose. Thus, sputter and plater will be the crucial equipment for this type of process. Wire bonders connect the input/output terminals on the silicon die using extremely fine gold or copper wire to leads on leadframes or substrates. Typically, a wire bonder may be used, with minor modifications, for the packaging of different products. As of January 31, 2026, we operated an aggregate of 25,001 wire bonders. For the packaging of certain types of substrate-based packages, die bonders are used in place of wire bonders. The number of bonders at a given facility is commonly used as a measure of the packaging capacity of the facility. In addition to bonders, we maintain a variety of other types of packaging equipment, such as wafer grinds, wafer mounts, wafer saws, heat sink placement, automated molding machines, laser markers, solder plates, pad printers, dejunkers, trimmers, formers, substrate saws, and scanners. We purchase our packaging equipment from major international manufacturers, including All Ring Tech Co., Ltd., Marketech lnternational Corp., Grand Process Technology Corporation, Tokyo Electron Limited, and Lam Research Corporation. Testing Testing equipment is the most capital-intensive component of the testing process. We generally seek to purchase testers from different suppliers with similar functionality and acquire the ability to test a variety of different semiconductors. We purchase testers from major international manufacturers, primarily Teradyne, Inc., Tokyo Electron Limited, and Advantest Corporation. Upon acquisition of new testers, we install, configure, calibrate, perform burn-in diagnostic tests on, and establish parameters for the testers based on the anticipated requirements of existing and potential customers and considerations relating to market trends. As of January 31, 2026, we operated an aggregate of 7,456 testers. In addition to testers, we maintain a variety of other types of testing equipment, such as automated handlers and probers (special handlers for wafer probing), scanners, reformers, and computer workstations for use in software development. Each tester may be attached to a handler or prober. Handlers attach to testers and transport individual packaged semiconductors to the tester interface. Probers similarly attach to the tester and align each individual die on a wafer with the interface to the tester. For the majority of our testing equipment, we typically base our purchases on prior discussions with our customers about their forecast requirements. The balance consists of testing equipment on consignment from customers, which is dedicated exclusively to the testing of these customers’ specific products. Test programs, which consist of the software that drives the testing of specific semiconductors, are written for a specific testing platform. We sometimes perform test program conversions that enable us to test semiconductors on multiple test platforms. This portability between testers enables us to allocate semiconductors tested across our available test capabilities and thereby improve capacity utilization rates. In cases where a customer requires the testing of a semiconductor product that is not yet fully developed, the customer may provide computer workstations to us to test specific functions. In cases where a customer has specified testing equipment that was not widely applicable to other products that we test, we have required the customer to furnish the equipment on a consignment basis. EMS The SMT assembly line is the key facility of our electronic manufacturing operations and generally includes a printer and one or two high-speed mounters and/or a multifunction mounter. The SMT assembly process primarily consists of the following three manufacturing steps: (i) solder paste stencil printing, (ii) component placement, and (iii) solder reflow. High-speed SMT assembly systems offer both economic and technical advantages that may reduce both production cost and time while meeting quality requirements. Thus, SMT has become the most popular assembly method for sophisticated electronic devices. We had 205 SMT lines as of January 31, 2026. 44 Table of Contents Intellectual Property As of January 31, 2026, we held a total of 6,358 patents, 1,938 Taiwan patents, 2,026 U.S. patents, 2,248 P.R.C. patents, 96 Europe patents, and 50 patents in other countries related to various semiconductor packaging technologies and invention, utility, and design on our EMS. In addition, as of January 31, 2026, we had a total of 2,249 pending patent applications, 263 in Taiwan, 739 in the U.S., 1,220 in the P.R.C., 22 in Europe, and 5 in other countries. Moreover, we filed several trademarks applications in Taiwan, the U.S., the P.R.C., and the EU. For example, “ASE,” “aCSP,” “a-EASI,” “a-fcCSP,” “aQFN,” “a-QFN,” “a-S3,” “a-TiV,” “aWLP,” “a-WLP,” “iSiP,” “iWLP,” “aSiM,” “SiP-id” “SPIL,” “HSiP,” “XnBay,” “Emerald,” and “VIPack” have been registered in Taiwan. We have also entered into various non-exclusive technology license agreements with other companies involved in the semiconductor manufacturing process, including Infineon Technologies AG, TDK Corporation, and DECA Technologies Inc. The technology we license from these companies includes solder bumping, redistribution, ultra CSP assembly, advanced QFN assembly, wafer-level packaging, and other technologies used in the production of package types, such as BCC, flip chip BGA, film BGA, aQFN, and chip embedding. One of our license agreements with Infineon Technologies AG will remain in effect until expiration of the patents licensed by the agreement, and the other automatically renews each year unless otherwise agreed between the parties. Our license agreements with TDK Corporation and DECA remain in effect until expiration of their respective patents licensed by the agreements. In addition, we improve our technological platform by licensing innovative package technologies. For example, through wafer bumping and redistribution technology, we are able to form and redistribute bumps on the chip to make a silicon die by directly attaching the substrate using bumps rather than wire bonding, and through wafer level CSP technology, we are able to produce a chip scale package at the stage of wafer level. Our success depends in part on our ability to obtain, maintain, and protect our patents, licenses, and other intellectual property rights, including rights under our license agreements with third parties. Quality Control We believe that our process technology and reputation for high quality and reliable services have been important factors in attracting and retaining leading international semiconductor companies as our customers. We maintain quality control staff at each of our facilities. Our quality control staff typically includes engineers, technicians, and other employees who monitor the processes in order to ensure high quality. Our quality assurance systems impose strict process controls, statistical in-line monitors, supplier control, data review and management, quality controls, and corrective action systems. Our quality control employees operate quality control stations along with production lines, monitor clean room environments, and follow up on quality through outgoing product inspection and interaction with customer service staff. We have established quality control systems that are designed to ensure high-quality products/service to customers, high testing reliability, and high production yields at our facilities. We also have established an environmental management system in order to comply with the environmental standards of our customers and the countries within which they operate. See “—Raw Materials and Suppliers—Packaging.” In addition, our facilities have been qualified by all of our major customers after satisfying stringent quality standards prescribed by these customers. Our packaging and testing operations are undertaken in clean rooms where air purity, temperature, and humidity are controlled. To ensure stability and integrity of our operations, we maintain clean rooms at our facilities that meet U.S. Federal Standard 209E class 1,000, 10,000 and 100,000 standards. ISE Labs’ testing facilities in Fremont, California are considered suitably equipped by the U.S. Defense Logistics Agency to perform the MIL-STD-883 tests on monolithic microcircuits in accordance with MIL-PRF-38535. We have also obtained many certifications on our packaging, testing, and interconnect materials facilities. Some of these certifications are required by some semiconductor manufacturers as a threshold indicator of a company’s quality control standards or by many countries in connection with sales of industrial products. The table below sets forth the main certifications or verifications we have for our packaging, testing and interconnect materials. 45 Table of Contents Location IATF 16949(1) ISO 9001(2) ISO 14001(3) ISO 17025(4) ISO 14064-1(5) ISO 14067(6) IECQ HSPM QC 080000 (7) Sony Green Partner (8) ISO 45001(9) TOSHMS(10) ISO 50001(11) ISO 13485(12) ISO 28000(13) ISO 26262(14) ISO 15408- EAL6(15) TL 9000((16) ISO 22301(17) RBA Edited (18) ISO/ IEC 27001(19) GSMA SAS-UP(20) ISO 46001(21) ISO 21434(22) IEC 62443 -2-1(23) Taiwan ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ P.R.C. ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ South Korea ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Japan ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Malaysia ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Singapore ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ U.S. ✓ ✓ ✓ ✓ ✓ ✓ ✓ the Philippines ✓ ✓ ✓ ✓ (1) IATF 16949 standard provides continual improvement with an emphasis on the prevention of defects and reduction of variation and waste in the supply chain. (2) ISO 9001 quality standards are related to quality management systems and designed to help organizations ensure that they meet the needs of customers and other stakeholders while meeting statutory and regulatory requirements related to the product. (3) ISO 14001 standard provides criteria for an environmental management system. It can be used by any organization that wants to improve resource efficiency, reduce waste and drive down costs. (4) ISO 17025 is the main ISO standard used by testing and calibration laboratories. (5) ISO 14064-1 standard provides governments, businesses, regions and other organizations with a complementary set of tools for programs to quantify, monitor, report and verify greenhouse gas emissions. (6) ISO 14067 standard provides guidelines for the quantification and communication of the carbon footprint of a product. (7) IECQ HSPM QC080000 is a certification designed to manage, reduce and eliminate hazardous substances. (8) “Sony Green Partner” indicates our compliance with the “Sony Green Package” standard requirements. (9) ISO 45001 standard provides a comprehensive framework to improve workplace safety, reduce risks, and enhance overall well-being. (10) TOSHMS is the Taiwan Occupational and Health Management System. (11) ISO 50001 standard provides a practical way to improve energy use, through the development of an energy management system (12) ISO 13485 standard provides the requirements for a quality management system specific to the medical devices industry. (13) ISO 28000 standard provides security management framework dealing with security assurance in a supply chain. (14) ISO 26262 standard provides guidelines for functional safety of electrical and electronic systems in production automobiles. (15) ISO 15408-EAL6 is a framework that outlines the criteria for globally recognized standards and security inspections for IT products. (16) TL 9000 standard provides the supply chain quality requirements of the global communications industry. (17) ISO 22301 standard provides guidelines requirements to plan, establish, implement, operate, monitor, review, maintain and continually improve a documented management system. (18) The Responsible Business Alliance (RBA) is the world’s largest industry coalition dedicated to responsible business conduct in global supply chains. (19) ISO/IEC 27001 standard provides companies of any size and from all sectors of activity with guidance for establishing, implementing, maintaining and continually improving an information security management system. (20) The Groupe Speciale Mobile Association (the “GSMA”) SAS-UP (Security Accreditation Scheme – Universal Integrated Circuit Card Production) standard defines a comprehensive set of protocols and security measures for securely handling production data, including certificate management, data generation, and data personalization for Smart Cards (SC) and eUICC-sensitive products. (21) ISO 46001 standard provides requirements and contains guidance for its use in establishing, implementing and maintaining a water efficiency management system. (22) ISO 21434 standard provides engineering requirements for cybersecurity risk management. (23) IEC 62443-2-1 standard provides best practices for cybersecurity and provides a way to assess the level of security performance. We also have strict process controls in our EMS business. Universal Global Scientific Industrial Co., Ltd.’s facilities in Nantou, Taiwan, are considered suitably equipped by the US Defense Logistics Agency to perform the MIL-STD-883 tests on assemble, seal, and test hybrid microcircuits in compliance with MIL-PRF-38534 Classes H and K. USI Asteelflash Poland Sp. z o.o. is in compliance with VDA 6.3 audit, which focuses on process audit for planning and manufacturing of products and services, and VDA 6.5, which is a qualification for product audit. The table below sets forth the certifications or verifications we have obtained for our EMS facilities. 46 Table of Contents Location IATF 16949 ISO 9001 ISO 14001 ISO 17025 ISO 14064-1 TISAX(1) IECQ HSPM QC 080000 ISO 45001 TOSHMS ISO 50001 ISO 13485 ISO 22301 ISO 26262 TL 9000 RBA Edition ISO 21434 ISO/IEC 27001 AS/EN 9100: 2016(2) Taiwan ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ P.R.C. ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Mexico ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Poland ✓ ✓ ✓ ✓ ✓ ✓ United Kingdom ✓ ✓ ✓ ✓ U.S. ✓ ✓ ✓ ✓ France ✓ ✓ ✓ ✓ ✓ Germany ✓ ✓ ✓ ✓ ✓ ✓ ✓ Czech Republic ✓ ✓ Tunisia ✓ ✓ ✓ Vietnam ✓ ✓ ✓ ✓ ✓ ✓ ✓ ✓ Hungary ✓ ✓ ✓ ✓ (1) TISAX standard provides the assessment and exchange mechanism for information security in the automotive industry. (2) AS/EN 9100: 2016 standard provides the management of development, production, manufacturing, installation, construction, and maintenance as well as trade and distribution for the aerospace industry. The global market for semiconductor packaging and testing markets is highly competitive. We face competition from a number of sources and IDMs with in-house packaging and testing capabilities and fabless semiconductor design companies with their own in-house testing capabilities. Some of these IDMs have commenced, or may commence, in-house packaging and testing operations in Asia. Substantially all of packaging and testing companies that compete with us have established operations in Taiwan and across the region. IDMs that use our services continuously evaluate our performance against their own in-house packaging and testing capabilities. These IDMs may have access to more sophisticated technologies and greater financial and other resources than we do. We believe, however, that we can offer greater efficiency at lower cost while maintaining equivalent or higher quality for several reasons. First, as we benefit from specialization and economies of scale by providing services to a large base of customers across a wide range of products, we are better able to reduce costs and shorten production cycles through high-capacity utilization and process expertise. Second, as a result of our customer base and product offerings, our equipment generally has a longer useful life. Third, as a result of the continuing reduction of investments in in-house packaging and testing capacity and technology at IDMs, we are better positioned to meet their packaging and testing requirements on a large scale. Our packaging and testing business also faces actual and potential competition from companies at other levels of the supply chain, which have the financial resources and technical capabilities to enter into and effectively compete within the industry. For example, TSMC has offered advanced packaging technologies such as integrated fan-out (the “InFO”) technology. Our EMS business faces significant competition from other EMS providers with comprehensive integration, wide geographic coverage, and large production capabilities that enable them to achieve economies of scale. We believe, however, that we can still achieve satisfactory performance in the market given that we have been able to provide products with high quality and we are capable of designing new products by cooperating with our customers. Environmental Matters Our operations of packaging, interconnect materials, and EMS generate both hazardous and non-hazardous wastes. We have installed various types of anti-pollution equipment for the treatment of liquid and gaseous chemical waste and adopted comprehensive antipollution measures for the effective management of environmental protection that we believe are consistent with international standards. In addition, we believe we are in compliance in all material respects with present environmental laws and regulations applicable to all our operations and facilities. In order to demonstrate our commitment to environmental protection, in December 2013, ASE’s board of directors approved contributions to environmental protection efforts in Taiwan in a total amount of not less than NT$3,000.0 million, to be made in the following 30 years. We have made contributions in the amount of NT$100.0 million (US$3.2 million) for each of the years 2023, 2024 and 2025 through the ASE Environmental Protection and Sustainability Foundation, which we established as a channel to continuously implement the activities related to environmental protection projects in Taiwan. 47 Table of Contents Our operations involving wafer-level process and requiring wastewater treatment at our Kaohsiung facility have been subject to scrutiny by the Kaohsiung City Environmental Protection Bureau as a result of alleged water pollution violations that occurred in 2013. For additional details of these administrative actions and judicial proceedings related to our environment claims, see “Item 8. Financial Information—Consolidated Statements and Other Financial Information—Legal Proceedings.” Defending against any of the pending or future actions will likely be costly and time-consuming and could significantly divert our management team’s efforts and resources. Any future suspension of operations at our facilities may adversely affect our business, financial condition, results of operations and cash flows. See “Item 3. Key Information—Risk Factors— Risks Relating to Our Business—Any environmental claims or failure to comply with any present or future environmental laws and regulations, as well as any fire or other industrial accident, may require us to spend additional funds and may materially and adversely affect our financial condition and results of operations.” Climate Change Management The board of directors of ASEH serves as the supervisory and governance body for climate-related issues. It is responsible for approving risk policies, overseeing climate-related risks, and making decisions pertaining to climate matters. The board of directors has established the risk management committee and the corporate sustainability and information security committee (the “CSISC”, formerly the corporate sustainability committee) as bodies responsible for managing climate-related risks and opportunities. Each committee consists of directors who are separately responsible for managing climate risks and climate sustainability strategies, promoting sustainable development, implementing risk management mechanisms, and implementing decisions made by the board of directors. We report on the management and execution status of climate-related issues to the board of directors on a quarterly basis, enabling the board of directors to understand the impact of climate change on our business operations and develop corresponding strategies. We conduct annual assessments of climate-related physical and transition risks. We utilize questionnaires to identify extreme weather events, including but not limited to heavy rainfall, drought, and significant temperature changes. Additionally, we assess the potential impact and influence of these weather events on our business operations and finances. In order to effectively implement our climate-related policies, the executive secretariat of the risk management committee collaborates with our subsidiaries to conduct an identification and assessment of climate-related physical and transition risks. This process involves using questionnaires and collecting data to identify physical and transition risks or events that could affect our business objectives, as well as their financial and operational implications. Based on the findings of this process, countermeasures and management strategies are proposed, and the results of climate risk identification are reported to the board of directors by the CSISC annually, which tracks the implementation status of our climate measures regularly. ASEH has passed a compliance review by the Science Based Targets initiative and also committed to Net-Zero emission targets to exert positive social influence. We have planned mid- and long-term absolute carbon reduction goals. Using 2016 as the base year for the completion of Scopes 1 and 2 verification, we plan to reduce absolute Scope 1 and 2 GHG emissions 58.8% by 2030 and commit to reduce absolute Scope 3 GHG emissions 25% by 2030 from a 2020 base year. We are committed to reducing the emission of greenhouse gases from our business operations. We aim to address and integrate climate change into our business strategies by investing in carbon credits, expanding the use of renewable energy and low-carbon transportation, developing low-carbon products, and supply chain engagement. We are committed to continuously revising and updating our targets, while tracking and monitoring the progress of our existing climate-related goals. Transition to Low-Carbon Economy Our climate leadership stems from bringing low carbon solutions to the global market and through balancing operational growth and low-carbon transformation targets that meet stakeholders’ expectations. 48 Table of Contents We are dedicated to providing high efficiency products as well as investing in the research and development of eco-friendly design. Starting from the product design stage, we actively incorporate environmentally friendly materials into production processes. We have also maintained a multi-site certification for ISO 14001, ISO 14064-1, ISO 14047, and ISO 50001, which regularly examines the effectiveness of our environment and energy management systems. Global warming and climate change are contributing to extreme weather patterns and causing more stress to the environment. As global citizens, we are taking measurable actions to support and promote environmental sustainability. We have signed up with the major customer’s “Supplier Clean Energy Program” to increase our energy efficiency and transition to clean and renewable electricity. We have also joined the Semiconductor Climate Consortium (SCC) which is the first global collaborative of semiconductor ecosystem companies focused on reducing greenhouse gas emissions across the value chain, and Taiwan Institute for Sustainable Energy’s Net-zero Emission Alliance in pledging commitment to Net-zero 2030/2050, to build a supply chain that is resilient, transformative, and progressive. We believe proactively engaging in supplier development is key to the sustainable development of our supply chain. We provide trainings, workshops, seminars, and face-to-face consultation to reinforce our suppliers’ capabilities to address sustainability issues and enhance their awareness of best practices for sustainability. In 2015, we joined the RBA, previously known as the Electronic Industry Citizens Coalition, and every year all of our facilities complete the RBA’s Self-Assessment Questionnaire to identify the labor, environmental, and ethical risks in their respective operations. To improve overall energy management, we established a green energy platform composed of multiple departments of the Group as well as teams based in Taiwan. We have allocated resources to support our suppliers in establishing GHG and product carbon footprint management systems that accelerate their efforts to meet emission regulatory requirements. In 2022, we collaborated with third party consultants on a medium to long term supplier low carbon guidance program which was conducted both online and in-person. The program not only supports suppliers to obtain external certifications such as ISO 14064-1certification and ISO 14067 but also facilitates carbon inventory management across the supply chain. During the guidance process, we identify carbon hotspots within suppliers’ operational processes and execute relevant emission reduction plans. By expanding the scope of engagement with our supply chain, we work with suppliers to enhance their carbon management capabilities and leverage our influence in the industry. As part of our strategic efforts to build a stable and more sustainable supply chain, we typically hold the Supplier Sustainability Awards every two or three years, which recognizes suppliers with outstanding performance in sustainability. The award program was jointly organized by all three ASEH subgroups. A new supplier incentive program focusing on ASEH’s Low Carbon, Circular, Collaborative and Inclusive strategies was launched, and the number of participating suppliers expanded. The program encourages suppliers to submit sustainability partnership projects of a 1-2 year duration for review by ASEH and independent third parties. The submitted projects will undergo a rigorous selection process based on the implementation timeframe and efficacy, and selected projects will be funded by the ASE Environmental Protection and Sustainability Foundation. Information Security Management We rely on the efficient and uninterrupted operation of complex information technology applications, systems, and networks to operate our business. Our systems are vulnerable to damage or interruption from earthquakes, terrorist attacks, floods, fires, power loss, telecommunications failures, cyberattacks, computer viruses, denial of service attacks, or other attempts to harm our system, and similar events. Cybersecurity threats continue to expand and evolve globally, and the risks we face from cyberattacks have increased significantly in recent years. Some of these attacks originate from well-organized, and highly skilled organizations. Although we maintain robust cybersecurity protocols to guard against these threats and there have not been reported major cyberattacks against our systems in recent years, any such attack or system or network disruption could result in a loss of our intellectual property, the release of commercially sensitive information and customer or employee personal data. Failures to protect the privacy of customer and employee confidential data against breaches of network security could result in damage to our reputation. For further details on our cybersecurity measures, see “Item 16K. Cybersecurity.” For more information about these risks, see “Risk Factors – Cyber-attacks could harm our business, financial condition, and results of operations.” Furthermore, some of our data centers are located in areas with a high risk of major earthquakes. Our data centers are also subject to break-ins, sabotage, and intentional acts of vandalism, and to potential disruptions if the operators of these facilities have financial difficulties. Some of our systems are not fully redundant, and our disaster recovery planning cannot account for all eventualities. The occurrence of a natural disaster, or a decision to close a facility we are using without adequate notice for financial reasons or other unanticipated problems at our data centers could result in loss of production capabilities and lengthy interruptions in our service. Any damage to or failure of our systems could result in interruptions in our service. Interruptions in our service could materially and adversely affect our business, financial condition, and results of operations. 49 Table of Contents Risk Management Our board of directors established a risk management committee and approved the “Risk Management Policies and Procedures” as the ultimate guiding risk management principle. Awareness in risk management forms an integral part of our management, and risk management has been duly incorporated into our business strategies and organizational culture. We conduct risk assessments on an annual basis. For major risks, we formulate specific management plans covering goals, organizational structure and responsibilities, and risk management procedures. These plans have been developed to identify, measure, monitor and control various risk exposures effectively. We also conduct a comprehensive evaluation on the probability impacts of various risks faced during the ordinary course of business and take appropriate measures to continuously make improvements to better respond to natural disasters and other disruptive events such as cyberattacks or energy crises that could adversely affect the operation of our business. We proactively implement risk management plans and report to the board of directors on a yearly basis. For a discussion of these risks and other factors, see “Item 3. Key Information—Risk Factors.” Insurance We have insurance policies covering property damage and damage to our production facilities, buildings, and machinery. We also have liability insurance policies, including but not limited to general liability insurance policies, product liability insurance policies for specified clients and products, and directors’ and officers’ insurance policies. In addition, considering the cybersecurity risks and challenges facing business entities, we adopted a cyber liability insurance policy, which is expected to help us respond to and control the impact of a cybersecurity incident. We are not insured against the loss of key personnel. ORGANIZATIONAL STRUCTURE The following chart illustrates our corporate structure, including our principal packaging, testing, and EMS manufacturing subsidiaries as of January 31, 2026. Except for USI Inc., the following chart does not include intermediate holding subsidiaries, internal trading subsidiaries, or those subsidiaries without manufacturing operations and in the process of construction. For complete information on our subsidiaries, see Note 4 to our consolidated financial statements included in this annual report. 50 Table of Contents Our Consolidated Subsidiaries ASE Group ASE Inc., which was established on March 23, 1984, is headquartered in Taiwan and provides packaging and testing services, wafer sort testing, final testing services, substrate design, and manufacturing. Major subsidiaries of ASE Group include ASE Inc. (includes ASE Chung Li), ASE Test Taiwan, ASE Malaysia, ISE Labs, ASE Singapore, ASE Electronics, ASE Korea, ASE Japan, ASE Shanghai, Wuxi Tongzhi, CHE, and ASEPCAYMAN (includes ASE Co., Ltd. - Philippines Branch). SPIL Group Siliconware Precision Industries Co., Ltd., which was established on May 17, 1984, is our wholly owned subsidiary. SPIL offers a full range of packaging and testing solutions, including advanced packages, substrate packages and leadframe packages, as well as testing for logic and mixed signal devices. SPIL also provides turnkey services, from packaging and testing services. See “Item 4. Information on the Company—Information on the Company—History and Development of the Company—SPIL Acquisition” for more information. USI Group USI Group engages primarily in EMS in relation to computing, consumer electronics, communications, industrial, and automotive, among other services and businesses. As of January 31, 2026, we held 100.0% interest in USI Inc., 71.6% interest in USI Shanghai through USI Inc. and ASE Shanghai, 75.1% interest in HCC Group through USI Inc., and 100.0% interest in FAFG through USIFR and USI Shanghai. See “Item 4. Information on the Company—Information on the Company—History and Development of the Company—USI Group and USI Group Restructuring” for more information. 51 Table of Contents PROPERTY, PLANTS AND EQUIPMENT We operate a number of packaging, testing, and electronic manufacturing facilities globally. Our facilities provide varying types or levels of services with respect to different end-product focus, customers, technologies, and geographic locations. With our diverse facilities we are able to tailor our packaging, testing, and electronic manufacturing solutions closely to our customers’ needs. The following table sets forth the location, commencement of operation, primary use, approximate floor space, and ownership of our principal manufacturing facilities in operation as of January 31, 2026. See “Item 5. Operating and Financial Review and Prospects—Liquidity and Capital Resources” for more information. Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased ASE Inc. Kaohsiung, R.O.C. March 1984 Our primary packaging facility, which offers complete semiconductor manufacturing solutions in conjunction with ASE Test Taiwan and foundries. Focuses primarily on packaging services such as flip chip, wafer bumping, and fine-pitch wire bonding. 10,795,000 Land: leased Buildings: owned and leased Chung Li, R.O.C. Acquired in July 1999 An integrated packaging and testing facility that specializes in semiconductors for communications and consumer applications. 4,187,000 Land and buildings: owned ASE Test Taiwan Kaohsiung, R.O.C. Acquired in April 1990 Our primary testing facilities, which offer complete semiconductor manufacturing solutions in conjunction with ASE Inc.’s facility in Kaohsiung and foundries located in Taiwan. Focuses primarily on advanced logic/mixed-signal/RF/3D IC testing for IDMs, fabless design companies, and system companies. 1,306,000 Land: leased Buildings: owned and leased ASE Malaysia Penang, Malaysia February 1991 An integrated packaging and testing facility that focuses primarily on the requirements of IDMs. 1,735,000 Land: leased Buildings: owned 52 Table of Contents Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased ASE Korea Paju, South Korea Acquired in July 1999 An integrated packaging and testing facility that specializes in semiconductors for radio frequency, sensor, and automotive applications. 1,532,000 Land and buildings: owned ISE Labs California, U.S. Acquired in May 1999 A front-end engineering and final testing facility located in Northern California in close proximity to some of the world’s largest fabless design companies. 144,000 Land and buildings: owned ASE Singapore Pte. Ltd. Singapore Acquired in May 1999 An integrated packaging and testing facility that specializes in semiconductors for communication, computers, and consumer applications. 443,000 Land: leased Buildings: owned and leased ASE Shanghai Shanghai, P.R.C. June 2004 Design and production of semiconductor packaging materials. 1,718,000 Land and buildings: leased ASE Japan Takahata, Japan Acquired in May 2004 An integrated semiconductor packaging and testing facility that specializes in cellular phone, household appliance, and automotive applications. 108,000 Land and buildings: leased ASE Electronics Kaohsiung, R.O.C. August 2006 Facilities for the design and production of interconnect materials such as substrates used in semiconductor packaging. 612,000 Land: leased Buildings: owned Wuxi Tongzhi Wuxi, P.R.C. Acquired in May 2013 An integrated semiconductor packaging and testing facility that specializes in consumer applications. 78,000 Land and buildings: leased 53 Table of Contents Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased CHE Cheonan, South Korea Acquired in August 2024 An integrated semiconductor packaging and testing facility. 11,000 Land and buildings: leased ASE Co., Ltd. - Philippines Branch Cavite, the Philippines Acquired in August 2024 An integrated semiconductor packaging and testing facility. 148,000 Land: leased Buildings: leased and owned Universal Scientific Industrial Nantou, R.O.C. Acquired in February 2010 Manufacture and sales of electronic components and related accessories. 401,000 Land and buildings: owned Universal Scientific Industrial De Mexico S.A. De C.V. Guadalajara and Tonala, Mexico Acquired in February 2010 Manufacture of motherboard manufacture and computer components. 2,031,000 Land and buildings: owned USI Shanghai Shanghai, P.R.C. Acquired in February 2010 Design, manufacture, and sales of electronic components. 1,786,000 Land: leased Buildings: owned and leased Universal Global Technology (Kunshan) Co. Ltd. Kunshan, P.R.C. August 2011 Design and manufacture of electronic components. 994,000 Land and buildings: leased Universal Global Scientific Industrial Co., Ltd. Nantou, R.O.C. February 2010 Manufacture of electronic components of telecommunication products and cars, and provision of related R&D services. 1,219,000 Land: owned Buildings: owned and leased Universal Global Technology (Shanghai) Co., Ltd. Shanghai, P.R.C. Established in September 2013 Sales and processing of computer and communication peripherals as well as business in import and export of goods and technology. 989,000 Land and buildings: leased USI Asteelflash Poland Sp. z o.o. Wroclaw-Kobierzyce, Poland Acquired in October 2019 Design and manufacture of electronic components and new electronic applications. 510,000 Land and buildings: owned Universal Global Technology (Huizhou) Co., Ltd. Huizhou, P.R.C. October 2021 Research and manufacture of new electronic applications, communications, computers, and other electronics products; provides auxiliary technical services as well as import and export services. 1,899,000 Land: leased Buildings: owned and leased 54 Table of Contents Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased UNIVERSAL SCIENTIFIC INDUSTRIAL VIETNAM COMPANY LIMITED Haiphong, Vietnam July 2021 Manufacture of IC assembly for wearable devices. 1,733,000 Land and buildings: owned EugenLight Technologies Chengdu, P.R.C. Acquired in January 2026 Manufacture, sales as well as research and development of high-data rate optoelectronic components and optical engines. 98,000 Land and buildings: leased Hirschmann Car Communication Kft. Bekescsaba, Hungary Acquired in October 2023 Manufacture and sales of antenna products and RF amplifiers, connectors and wave straps. 618,000 Land and buildings: owned Hirschmann Car Communication GmbH Neckartenzlingen, Germany Acquired in October 2023 Manufacture, sales as well as research and development of printed circuit board assemblies (PCBAs) and tuners. 378,000 Land and buildings: leased ASTEELFLASH (BEDFORD) LIMITED Bedford, United Kingdom Acquired in December 2020 Design and manufacture of electronic components, such as industrial, telecommunication, IoT, data processing, consumer electronics, and aerospace related devices. 51,000 Land and buildings: leased ASTEELFLASH FRANCE Mercin-et-Vaux, Normandie, Duttlenheim, Langon, and Grenoble, France Acquired in December 2020 Manufacture of electronic components, such as PCBA and BOXBUILD, and in-house assembly and component storage 671,000 Land and buildings: owned ASTEELFLASH TUNISIE S.A. La Soukra, Tunisia Acquired in December 2020 Manufacture of electronic components, such as PCBA assembly, coating, varnishing, and in-circuit testing capabilities. 276,000 Land and buildings: leased 55 Table of Contents Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased ASTEELFLASH TECHNOLOGIE Alencon, France Acquired in December 2020 Design and manufacture of industrial components as well as projection of plastic. 172,000 Land and buildings: owned Asteelflash Suzhou Co., Ltd. Suzhou, P.R.C. Acquired in December 2020 Design and manufacture of electronic components, such as in SMT assembly for PCBA and system assembly/box build for module/final product in different segments. 1,460,000 Land: leased Buildings: owned and leased Asteelflash Germany GmbH. Bad Hersfeld, Germany Acquired in December 2020 Design and manufacture of electronic components, such as PCB assembly and high/medium mix to low/medium volume electronic manufacturing services. 1,005,000 Land and buildings: owned and leased ASTEELFLASH DESIGN SOLUTIONS HAMBURG GmbH Hamburg, Germany Acquired in December 2020 Design and manufacture of electronic components, such as low/mid volumes with mid/high complexity products. 34,000 Buildings: leased ASTEELFLASH PLZEN S.R.O. Pilsen, Czech Republic Acquired in December 2020 Design and manufacture of electronic components, such as solder paste printers and in-line solder paste inspection. 42,000 Land and buildings: leased ASTEELFLASH USA CORP. California, U.S. Acquired in December 2020 Design and manufacture of electronic components, such as solder paste printers and in-line solder paste inspection. 130,000 Land and buildings: leased ASTEELFLASH MEXICO S.A. de C.V. Tijuana, Mexico Acquired in December 2020 Design and manufacture of electronic components such as automotive and commercial products. 265,000 Land and buildings: leased 56 Table of Contents Facility Location Commencement of Operation Primary Use Approximate Floor Space (in sq. ft.) Owned or Leased Siliconware Precision Industries Co., Ltd. Taichung, Changhua, Yunlin and Hsinchu, R.O.C. Acquired in April 2018 Packaging and testing facility, which offers semiconductor packaging and testing services. 11,429,000 Land: owned and leased Buildings: owned SPILSZ Suzhou, P.R.C. Acquired in April 2018 Packaging and testing facility, which offers semiconductor packaging and testing services. 2,171,000 Land: leased Buildings: owned We have leased land in the Kaohsiung Nanzih Technology Industrial Park from Bureau of Industrial Parks, Ministry of Economic Affairs (the “MOEA”) with different lease terms for several years that will expire in July 2069. We have leased land from the Central Taiwan Science Park Administration in Taichung with 19-year to 20-year terms that will expire in December 2041. We have leased land from Hsinchu Science Park Administrations in Hsinchu with 20-year to 40-year terms that will expire in December 2043. We have leased land in Taichung from MOEA for 10 years that will expire in March 2032. No sublease or lending of the land is allowed. The MOEA, the Central Taiwan Science Park Administration, and the Hsinchu Science Park Administrations have the right to adjust the rental price in the event the government revalues the land. The leases are typically renewable with one-month to three-month notice prior to the termination date. Smart Factory To enhance factory efficiency, improve manufacturing process quality, and meet customer delivery time demands, we have invested in automated, lights-out factories. Automation, heterogeneous integration in machine and production systems, and heterogeneous integration in SiP are three major forces driving smart factories and digital transformation. This integration achieves automation of production processes, digitalization and intelligence. As of December 31, 2025, 45% of our facilities in Taiwan had implemented smart factory, with more than 80% of sites or production lines utilizing technologies such as IoT, AI, big data analytics, automation, cloud computing and sensing systems to enable real-time integration among equipment, machinery and systems. We will continue to make further investment into automating manufacturing capacity. We continuously evaluate our need for future expansion based on market condition and future demand requirements to meet our expected future growth. For information on the aggregate capacity of our facilities we operate, see “—Business Overview—Equipment.” For administrative actions and judicial proceedings related to Kaohsiung Facility, see “Item 8. Financial Information—Consolidated Statements and Other Financial Information—Legal Proceedings.”